{"product_id":"architectural-optimizations-in-multi-core-processors-9783639101577","title":"Architectural Optimizations in Multi-Core Processors","description":"\u003cp\u003e • Author(s): Sevin Fide\u003cbr\u003e • Publisher: VDM Verlag\u003cbr\u003e • Publisher Imprint: VDM Verlag\u003cbr\u003e • BISAC: Computer Engineering\u003c\/p\u003e\u003cp\u003eThe quest for greater computational power is never-ending. Recently, the architectural trend has shifted from improving single-threaded application performance to improving multi-threaded application per-formance. Thus, multi-core processors have been increasingly popular. To achieve concurrent execution of threads on multi-core processors, applications must be explicitly restructured to exploit parallelism, either by programmers or compilers. However, conventional parallel pro-gramming models may introduce overhead due to synchronization and communications among threads in multi-threaded applications. This book presents three architectural optimizations to improve thread-based synchronization and communications support in multi-core processors. Register-Based Synchronization (RBS) uses hardware registers efficiently to provide synchronization support in multi-core processors. Prepushing is a software controlled data forwarding technique to provide communications support in multi-core processors. Software Controlled Eviction (SCE) improves shared cache communications by placing shared data in shared caches.\u003c\/p\u003e","brand":"VDM Verlag","offers":[{"title":"Paperback","offer_id":47610747060375,"sku":"9783639101577","price":5439.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0666\/3471\/1191\/files\/9783639101577.webp?v=1775066892","url":"https:\/\/atlanticbooks.com\/products\/architectural-optimizations-in-multi-core-processors-9783639101577","provider":"Atlantic Books","version":"1.0","type":"link"}