{"product_id":"writing-testbenches-functional-verification-of-hdl-models-9781461350125","title":"Writing Testbenches: Functional Verification of Hdl Models","description":"\u003cp\u003e • Author(s): Janick Bergeron\u003cbr\u003e • Publisher: Springer\u003cbr\u003e • Publisher Imprint: Springer\u003cbr\u003e • BISAC: Programming - Compilers\u003c\/p\u003e\u003cp\u003e\u003c\/p\u003e\u003cp\u003emental improvements during the same period. What is clearly needed in verification techniques and technology is the equivalent of a synthesis productivity breakthrough. In the second edition of Writing Testbenches, Bergeron raises the verification level of abstraction by introducing coverage-driven constrained-random transaction-level self-checking testbenches- all made possible through the introduction of hardware verification languages (HVLs), such as e from Verisity and OpenVera from Synopsys. The state-of-art methodologies described in Writing Test- benches will contribute greatly to the much-needed equivalent of a synthesis breakthrough in verification productivity. I not only highly recommend this book, but also I think it should be required reading by anyone involved in design and verification of today's ASIC, SoCs and systems. Harry Foster Chief Architect Verplex Systems, Inc. xviii Writing Testbenches: Functional Verification of HDL Models PREFACE If you survey hardware design groups, you will learn that between 60% and 80% of their effort is now dedicated to verification.\u003c\/p\u003e","brand":"Springer","offers":[{"title":"Paperback","offer_id":45284307599511,"sku":"9781461350125","price":16159.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0666\/3471\/1191\/files\/9781461350125.webp?v=1769280789","url":"https:\/\/atlanticbooks.com\/products\/writing-testbenches-functional-verification-of-hdl-models-9781461350125","provider":"Atlantic Books","version":"1.0","type":"link"}