This book covers the history and recent developments of stochastic computing. Stochastic computing (SC) was first introduced in the 1960s for logic circuit design, but its origin can be traced back to von Neumann's work on probabilistic logic. In SC, real numbers are encoded by random binary bit streams, and information is carried on the statistics of the binary streams. SC offers advantages such as hardware simplicity and fault tolerance. Its promise in data processing has been shown in applications including neural computation, decoding of error-correcting codes, image processing, spectral transforms and reliability analysis.
There are three main parts to this book. The first part, comprising Chapters 1 and 2, provides a history of the technical developments in stochastic computing and a tutorial overview of the field for both novice and seasoned stochastic computing researchers. In the second part, comprising Chapters 3 to 8, we review both well-established and emerging design approaches for stochastic computing systems, with a focus on accuracy, correlation, sequence generation, and synthesis. The last part, comprising Chapters 9 and 10, provides insights into applications in machine learning and error-control coding.
Warren J. Gross received the B.A.Sc. degree in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 1996, and the M.A.Sc. and Ph.D. degrees from the University of Toronto, Toronto, ON, Canada, in 1999 and 2003, respectively. He is a Professor and Louis-Ho Faculty Scholar in Technological Innovation in the Department of Electrical and Computer Engineering, McGill University, Montreal, QC, Canada. He currently serves as Chair of the Department. His research interests are in the design and implementation of signal processing systems and custom computer architectures.
Dr. Gross served as the Chair for the IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems. He served as the General Co-Chair for the IEEE GlobalSIP 2017 and the IEEE SiPS 2017 and the Technical Program Co-Chair for SiPS 2012. He also served as an Organizer for the Workshop on Polar Coding in Wireless Communications at WCNC 2018 and WCNC 2017, the Symposium on Data Flow Algorithms and Architecture for Signal Processing Systems (GlobalSIP 2014), and the IEEE ICC 2012 Workshop on Emerging Data Storage Technologies. He served as an Associate Editor for the IEEE Transactions on Signal Processing and as a Senior Area Editor. He is a Licensed Professional Engineer in the Province of Ontario.
Vincent Gaudet received the B.Sc. in Computer Engineering from the University of Manitoba in 1995, the M.A.Sc. from the University of Toronto in 1997, and the Ph.D. from the University of Toronto in 2003. Since 2010 he has been with the Department of Electrical and Computer Engineering at the University of Waterloo. He previously held appointments as a faculty member at the University of Alberta (2002-2010) and as a Research Associate at Télécom-Bretagne in Brest, France (2002). In 2008-2009 he was on sabbatical leave at Northeastern University in Boston, MA, and atTohoku University in Sendai, Japan.
His research interests focus on energy-efficient microelectronic circuits for information processing, and more specifically, on high-performance circuits for graph-based decoding of error-control codes such as Turbo and Low-Density Parity-Check (LDPC) codes. He is also interested in stochastic computing and multiple-valued logic. He has taught several courses in analog and digital microelectronic circuit design, at the undergraduate and graduate levels, and previously served as the Associate Chair for Undergraduate Studies (2013-2016).
Prof. Gaudet is a Senior Member of the IEEE and is licensed as a Professional Engineer. He has served as Associate Editor for the IEEE Transactions on Circuits and Systems, Parts I and II, and is a Technical Editor for the IEEE International Solid-State Circuits Conference. He was previously Chair (2016-2017) of the IEEE Computer Society Technical Committee on Multiple-Valued Logic and is an elected member (2013-2018) of the IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal-Processing Systems. He was the Program Chair for the 2012 IEEE International Symposium on Multiple-Valued Logic (ISMVL) in Victoria, BC, and General Chair of ISMVL 2015 in Waterloo. He was the recipient of the 2009 Petro Canada Young Innovator Award and the Fall 2015 EngSoc Teaching Excellence Award. He has been serving as Department Chair since July 2016.
