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Vertical 3D Memory Technologies

by Betty Prince
Save 12% Save 12%
Current price ₹10,498.00
Original price ₹11,885.00
Original price ₹11,885.00
Original price ₹11,885.00
(-12%)
₹10,498.00
Current price ₹10,498.00

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Book cover type: Hardcover
  • ISBN13: 9781118760512
  • Binding: Hardcover
  • Subject: N/A
  • Publisher: Wiley
  • Publisher Imprint: Wiley
  • Publication Date:
  • Pages: 351
  • Original Price: GBP 93.95
  • Language: English
  • Edition: N/A
  • Item Weight: 704 grams
  • BISAC Subject(s): Electronics / Semiconductors and Imaging Systems

The large scale integration and planar scaling of individual system chips is reaching an expensive limit. If individual chips now, and later terrabyte memory blocks, memory macros, and processing cores, can be tightly linked in optimally designed and processed small footprint vertical stacks, then performance can be increased, power reduced and cost contained. This book reviews for the electronics industry engineer, professional and student the critical areas of development for 3D vertical memory chips including: gate-all-around and junction-less nanowire memories, stacked thin film and double gate memories,  terrabit vertical channel and vertical gate stacked NAND flash, large scale stacking of  Resistance RAM cross-point arrays, and 2.5D/3D stacking of memory and processor chips with through-silicon-via  connections now and remote links later.

Key features:

*Presents a review of the status and trends in 3-dimensional vertical memory chip technologies. *Extensively reviews advanced vertical memory chip technology and development *Explores technology process routes and 3D chip integration in a single reference

Dr Betty Prince has over 30 years' experience in the semiconductor industry having worked with Texas Instruments, N.V. Philips, Motorola, R.C.A., and Fairchild and is currently CEO of Memory Strategies International. She has authored four books and served from 1991-1994 on the Technical Advisory Board of IEEE Spectrum magazine. She is a Senior Life Member of the IEEE and served as an IEEE SSCS Distinguished Lecturer and on the Program Committee of the IEEE Custom Integrated Circuit conference. She was founder of the JEDEC JC-16 Interface Standards Committee and was active for many years on the JC-42 Memory Committee where she was co-chair of the SRAM standards group. She has been U.S. representative to the IEC SC47A WG3 Memory Standards Committee. Dr Prince has served on the Technical Advisory Board of several memory companies and has been on the Board of Directors of Mosaid Technologies. She holds patents in the memory, processor and interface areas and has degrees in Physics, Math, and Finance with doctoral dissertation in fractal modeling.

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