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Accelerated Computing With HIP: Second Edition

by Yifan Sun
Save 26% Save 26%
Current price ₹3,076.00
Original price ₹4,174.00
Original price ₹4,174.00
Original price ₹4,174.00
(-26%)
₹3,076.00
Current price ₹3,076.00

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Book cover type: Paperback
  • ISBN13: 9798218576578
  • Binding: Paperback
  • Subject: N/A
  • Publisher: Sun, Al Jannat, Baruah, Kaeli
  • Publisher Imprint: Sun, Al Jannat, Baruah, Kaeli
  • Publication Date:
  • Pages: 300
  • Original Price: GBP 32.99
  • Language: English
  • Edition: N/A
  • Item Weight: 694 grams
  • BISAC Subject(s): General and General

This book is designed for programmers who wish to use GPUs to improve application performance, and it is suitable for both AMD and NVIDIA GPU programmers, as HIP is a portable language that runs on both platforms. ROCm is open sourced, allowing other GPU developers to support this platform. This book does not require knowledge of CUDA programming, however, we highlight how HIP differs from CUDA while explaining how to port those programs to HIP, promoting interoperability such that a single application can be executed on different underlying hardware. For non-CUDA programmers, our book starts with the basics by presenting how HIP is a full-featured parallel programming language. Then, we provide coding examples that cover a wide range of relevant programming paradigms.

Al Jannat, Sabila: - Sabila Al Jannat is pursuing her Ph.D. in Computer Science at William and Mary. Her advisor is Prof. Yifan Sun. Prior to joining William and Mary, she completed her BS degree in Computer Science and Engineering at BRAC University in Bangladesh.

Baruah, Trinayan: - Trinayan Baruah is Senior Member of the Technical Staff at AMD. He received his MS and Ph.D. degrees from the Department of Electrical and Computer Engineering at Northeastern University in 2020. His research interests include GPU microarchitecture, simulation, compilers and memory systems.

Sun, Yifan: - Yifan Sun is an Assistant Professor in the Department of Computer Science at William & Mary, where he leads the Scalable Architecture Lab. He received his Ph.D. degree from the Department of Electrical and Computer Engineering at Northeastern University in 2020. His research interests lie in GPU architecture, performance evaluation, and performance modeling.

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