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Embedded Sopc Design with Nios II Processor and VHDL Examples

by Pong P. Chu
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Current price ₹13,776.00
Original price ₹14,598.00
Original price ₹14,598.00
Original price ₹14,598.00
(-6%)
₹13,776.00
Current price ₹13,776.00

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Book cover type: Hardcover
  • ISBN13: 9781118008881
  • Binding: Hardcover
  • Subject: N/A
  • Publisher: Wiley
  • Publisher Imprint: Wiley
  • Publication Date:
  • Pages: 736
  • Original Price: USD 148.95
  • Language: English
  • Edition: N/A
  • Item Weight: 1452 grams
  • BISAC Subject(s): Electronics / Circuits / General and Computer Engineering

The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology.

The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration.

Dr. Pong P. Chu is an Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He obtained a BS degree from National Chiao Tung University, Taiwan, and a PhD from Iowa State University. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.

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