Electrostatic discharge (ESD) continues to impact semiconductor manufacturing, semiconductor components and systems, as technologies scale from micro- to nano electronics. This book introduces the fundamentals of ESD, electrical overstress (EOS), electromagnetic interference (EMI), electromagnetic compatibility (EMC), and latchup, as well as provides a coherent overview of the semiconductor manufacturing environment and the final system assembly. It provides an illuminating look into the integration of ESD protection networks followed by examples in specific technologies, circuits, and chips.
The text is unique in covering semiconductor chip manufacturing issues, ESD semiconductor chip design, and system problems confronted today as well as the future of ESD phenomena and nano-technology.
Look inside for extensive coverage on:
*The fundamentals of electrostatics, triboelectric charging, and how they relate to present day manufacturing environments of micro-electronics to nano-technology *Semiconductor manufacturing handling and auditing processing to avoid ESD failures *ESD, EOS, EMI, EMC, and latchup semiconductor component and system level testing to demonstrate product resilience from human body model (HBM), transmission line pulse (TLP), charged device model (CDM), human metal model (HMM), cable discharge events (CDE), to system level IEC 61000-4-2 tests *ESD on-chip design and process manufacturing practices and solutions to improve ESD semiconductor chip solutions, also practical off-chip ESD protection and system level solutions to provide more robust systems *System level concerns in servers, laptops, disk drives, cell phones, digital cameras, hand held devices, automobiles, and space applications *Examples of ESD design for state-of-the-art technologies, including CMOS, BiCMOS, SOI, bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, smart power, magnetic recording technology, micro-machines (MEMs) to nano-structures
ESD Basics: From Semiconductor Manufacturing to Product Use complements the author’s series of books on ESD protection. For those new to the field, it is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic Era.
Dr. Steven H. Voldman, IEEE Fellow, Vermont, USA. Prolific Wiley writer, Dr. Steven Voldman has been involved with ESD work since 1991. He has been Chairman of the ESD Association WG 5.5 on TLP testing since 2001 and he was Chairman of the SEMATECH ESD Working Group on ESD Technology from 1995 until 1998.
Dr. Voldman worked 25 years at IBM before working at Qimonda in 2007 and then TSMC Corporation in 2008. Currently he holds 181 patents in the areas of ESD and latchup, and has 125 pending. His fields of expertise are electrostatic discharge (ESD) protection, latchup, ESD testing and ESD design. To date, he has worked on many design architectures from SRAM, DRAM, ASICs, Microprocessors, NVRAMs, image processing designs and power technology.
