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Functional Verification of Programmable Embedded Architectures: A Top-Down Approach

by Prabhat Mishra
Save 35% Save 35%
Current price ₹7,277.00
Original price ₹11,194.00
Original price ₹11,194.00
Original price ₹11,194.00
(-35%)
₹7,277.00
Current price ₹7,277.00

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Book cover type: Paperback
  • ISBN13: 9781489973368
  • Binding: Paperback
  • Subject: N/A
  • Publisher: Springer
  • Publisher Imprint: Springer
  • Publication Date:
  • Pages: 180
  • Original Price: EUR 99.99
  • Language: English
  • Edition: 2005
  • Item Weight: 295 grams
  • BISAC Subject(s): Computer Architecture, Software Development & Engineering / Systems Analysis & Design, and Electronics / Circuits / Integrated

From the Back Cover

Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models.

This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect's knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric.

Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems.

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