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High Speed and Wide Bandwidth Delta-SIGMA Adcs

by Muhammed Bolatkale
Save 35% Save 35%
Current price ₹7,345.00
Original price ₹11,299.00
Original price ₹11,299.00
Original price ₹11,299.00
(-35%)
₹7,345.00
Current price ₹7,345.00

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Book cover type: Paperback
  • ISBN13: 9783319058399
  • Binding: Paperback
  • Subject: N/A
  • Publisher: Springer
  • Publisher Imprint: Springer
  • Publication Date:
  • Pages: 133
  • Original Price: EUR 99.99
  • Language: English
  • Edition: 2014
  • Item Weight: 409 grams
  • BISAC Subject(s): Electronics / Circuits / General and Signals & Signal Processing

From the Back Cover

This book describes techniques for realizing wide bandwidth (125MHz) over-sampled analog-to-digital converters (ADCs) in nanometer-CMOS processes. The authors offer a clear and complete picture of system level challenges and practical design solutions in high-speed Delta-Sigma modulators. Readers will be enabled to implement ADCs as continuous-time delta-sigma (CT∆Σ) modulators, offering simple resistive inputs, which do not require the use of power-hungry input buffers, as well as offering inherent anti-aliasing, which simplifies system integration. The authors focus on the design of high speed and wide-bandwidth ΔΣMs that make a step in bandwidth range which was previously only possible with Nyquist converters. More specifically, this book describes the stability, power efficiency, and linearity limits of ΔΣMs, aiming at a GHz sampling frequency.

- Provides overview of trends in Wide Bandwidth and High Dynamic Range analog-to-digital converters (ADCs);
- Enables the design of a wide bandwidth, high dynamic range modulator with state-of-the-art power efficiency;
- Includes introduction to Continuous-Time Delta-Sigma Modulators and its system level modeling;
- Explains issues relating to stability of Continuous-Time Delta-Sigma Modulators;
- Includes discussion of system level non-idealities in Continuous-Time Delta-Sigma Modulators;
- System level design of CT∆Σ modulators at GHz sampling frequencies;
- Practical implementation details of high speed CT∆Σ ADCs;
- Overview of static and dynamic error correction techniques in ∆Σ ADCs;
- Dynamic error correction techniques that are suitable for high speed CT∆Σ ADCs.

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