A practical guide to the effects of radiation on semiconductor components of electronic systems, and techniques for the designing, laying out, and testing of hardened integrated circuits
This book teaches the fundamentals of radiation environments and their effects on electronic components, as well as how to design, lay out, and test cost-effective hardened semiconductor chips not only for today’s space systems but for commercial terrestrial applications as well. It provides a historical perspective, the fundamental science of radiation, and the basics of semiconductors, as well as radiation-induced failure mechanisms in semiconductor chips.
Integrated Circuits Design for Radiation Environments starts by introducing readers to semiconductors and radiation environments (including space, atmospheric, and terrestrial environments) followed by circuit design and layout. The book introduces radiation effects phenomena including single-event effects, total ionizing dose damage and displacement damage) and shows how technological solutions can address both phenomena.
*Describes the fundamentals of radiation environments and their effects on electronic components *Teaches readers how to design, lay out and test cost-effective hardened semiconductor chips for space systems and commercial terrestrial applications *Covers natural and man-made radiation environments, space systems and commercial terrestrial applications *Provides up-to-date coverage of state-of-the-art of radiation hardening technology in one concise volume *Includes questions and answers for the reader to test their knowledge
Integrated Circuits Design for Radiation Environments will appeal to researchers and product developers in the semiconductor, space, and defense industries, as well as electronic engineers in the medical field. The book is also helpful for system, layout, process, device, reliability, applications, ESD, latchup and circuit design semiconductor engineers, along with anyone involved in micro-electronics used in harsh environments.
STEPHEN J. GAUL is a Senior Principal Engineer at Renesas Electronics Americas, Inc., Florida, USA. He has worked in the semiconductor/integrated circuit field for over 35 years and has authored many papers and over 35 patents, many specific to radiation-hard/radiation-tolerant techniques.
NICOLAAS VAN VONNO is currently a Principal Engineer at Renesas Electronics Americas, Inc., Florida, USA, and has been an independent consultant in the radiation effects field. He has been Guest Editor, Session Chairman, and Short Course Chairman for the IEEE Nuclear and Space Radiation Effects Conference (NSREC).
STEVEN H. VOLDMAN, Ph.D., is a Consultant on ESD and latchup, as well as invention and patenting. He is a Fellow of the Electrical and Electronics Engineers (IEEE) and author of over 10 books and 262 patents.
WESLEY H. MORRIS is President of Silicon-X (Technology focus), hardening CMOS devices to radiation and extreme temperatures. His career experience includes development of RH CMOS devices with SOS (RCA) and SOI (Harris), the first to prove bulk CMOS devices can be made latchup immune to extreme SEE radiation and operate reliably at high temperatures (250C). Morris is an author/inventor with multiple papers and patents related to RH and HT topics.
