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System on Chip Interfaces for Low Power Design

by Sanjeeb Mishra
Save 40% Save 40%
Current price ₹5,626.00
Original price ₹9,376.00
Original price ₹9,376.00
Original price ₹9,376.00
(-40%)
₹5,626.00
Current price ₹5,626.00

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Book cover type: Paperback
  • ISBN13: 9780128016305
  • Binding: Paperback
  • Subject: N/A
  • Publisher: Morgan Kaufmann Publishers
  • Publisher Imprint: Morgan Kaufmann Publishers
  • Publication Date:
  • Pages: 406
  • Original Price: USD 99.95
  • Language: English
  • Edition: N/A
  • Item Weight: 840 grams
  • BISAC Subject(s): Hardware / Chips & Processors, Software Development & Engineering / Systems Analysis & Design, and Electronics / Digital

System on Chip Interfaces for Low Power Design provides a top-down understanding of interfaces available to SoC developers, not only the underlying protocols and architecture of each, but also how they interact and the tradeoffs involved. The book offers a common context to help understand the variety of available interfaces and make sense of technology from different vendors aligned with multiple standards. With particular emphasis on power as a factor, the authors explain how each interface performs in various usage scenarios and discuss their advantages and disadvantages. Readers learn to make educated decisions on what interfaces to use when designing systems and gain insight for innovating new/custom interfaces for a subsystem and their potential impact.

Mishra, Sanjeeb: - Sanjeeb Mishra is a Validation Architect with Intel. He has 15 years of experience ranging from hardware system design to SOC validation for telecom, consumer electronics, PC and mobility products; and has specific expertise on SoC architecture for mobile devices.

Rousseau, Vijayakrishnan: - Vijayakrishnan Rousseau is a Technical Lead at Intel. He has 15 years of experience in GPU and SOC validation with specialization in Display interfaces like HDMI, Display Port and Emulation.

Singh, Neeraj Kumar: - Neeraj Kumar Singh is a Platform Architect for tablet platforms at Intel. Prior to this he worked on CPU, Graphics and Chipset validation tools. His areas of expertise are hardware software co-design, SoC system architecture, and system software design and development.

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