The Super-Evolution of Semiconductors
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Tadahiro Kuroda received his bachelor's and PhD degree in electrical engineering from the University of Tokyo in Japan in 1982 and 1999 respectively. He joined Toshiba Corporation in 1982 where he designed SRAMs and ASICs and engaged in the R&D of high-speed and low-power chips for telecommunications and mobile applications. Between 1988 and 1990, he was an Industrial Fellow at the University of California, Berkeley, where he conducted research in the field of VLSI CAD. In 2000, he joined Keio University, Japan, where he became a full professor in 2002. He was a MacKay Professor at the University of California, Berkeley, in 2007. He joined the Graduate School of Engineering at the University of Tokyo in 2019. His research interests include 3D chip integration using near-field coupling and power-efficient processor design including machine learning AI accelerators.
Tadahiro has published more than 450 technical papers, written 30 books/chapters, filed more than 200 patents, founded 2 companies, and served as chair on 7 international semiconductor conference committees. He has been a leading contributor to the IEEE International Solid-State Circuits Conference (ISSCC), the foremost global forum known as the "IC Olympics," ranking 6th in the world for total number of papers in the whole history of IC, 1954-2013, and 5th in the decade of 2004-2013. He is a recipient of the 2005 P&I Patent of the Year Award, the 2013 Nikkei Electronics Japan Wireless Technology Award, and the 2017 Nikkei Electronics Analog Innovation Award. He is an IEEE Fellow and an IEICE Fellow.
At the University of Tokyo, Tadahiro established and is serving as head of both the Systems Design Lab and Research Association for Advanced Systems. He is also the principal investigator of a 5-year national project with an approximately $50M budget to develop advanced wafer bonding technology to establish a competitive advantage for Japan's semiconductor industry. In addition, he leads the Agile-X Center for the Democratization of Innovative Semiconductor Technology with a total budget of about $30M, launched under the government's initiative to establish core academic centers to pursue R&D of next-generation semiconductors and develop high-caliber professionals, both of which are critical to ensure the country's economic security.
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