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Variation Tolerant On-Chip Interconnects

by Ethiopia Enideg Nigussie
Save 35% Save 35%
Current price ₹8,079.00
Original price ₹12,429.00
Original price ₹12,429.00
Original price ₹12,429.00
(-35%)
₹8,079.00
Current price ₹8,079.00

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Book cover type: Paperback
  • ISBN13: 9781489990860
  • Binding: Paperback
  • Subject: N/A
  • Publisher: Springer
  • Publisher Imprint: Springer
  • Publication Date:
  • Pages: 172
  • Original Price: EUR 109.99
  • Language: English
  • Edition: 2012
  • Item Weight: 270 grams
  • BISAC Subject(s): Electronics / Circuits / General, Nanotechnology & MEMS, and Logic Design

From the Back Cover

This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems.

  • Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect;
  • Describes design techniques to mitigate problems caused by variation;
  • Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.



Introduction.- Interconnect Design Techniques.- On-Chip Wire Modeling.- Design of Delay-Insensitive Current Sensing Interconnects.- Enhancing Completion Detection Performance.- Energy Efficient Semi-Serial Interconnect.- Comparison of the Designed Interconnects.- Circuit Techniques for PVT Variation Tolerance.

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