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VLSI Chip Design with the Hardware Description Language Verilog: An Introduction Based on a Large RISC Processor Design

by P. Blinzer
Save 35% Save 35%
Current price ₹3,672.00
Original price ₹5,649.00
Original price ₹5,649.00
Original price ₹5,649.00
(-35%)
₹3,672.00
Current price ₹3,672.00

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Book cover type: Paperback
  • ISBN13: 9783642646508
  • Binding: Paperback
  • Subject: N/A
  • Publisher: Springer
  • Publisher Imprint: Springer
  • Publication Date:
  • Pages: 360
  • Original Price: EUR 49.99
  • Language: English
  • Edition: Softcover Repri
  • Item Weight: 567 grams
  • BISAC Subject(s): Hardware / Chips & Processors, Logic Design, and Electronics / General

From the Back Cover
This book introduces to modern design of large chips. A powerful RISC processor in the range of a SPARC is apecified in a hardware description language (HDL), it is developed hierarchically and is finally sent as a gate model to the silicon vendor LSI Logic for production. The resulting processor on a semi-custom gate-array chip with more than 50.000 used gates and an efficiency of up to 40 MIPS is tested on an automatic test equipment and a testboard. The book also introduces thoroughly to the HDL VERILOG. The included disk contains more than 40 small and medium sized executable VERILOG examples, the large processor models and the VERILOG simulator VeriWell running on PC or SPARC.

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